Ryzen 3xxx supply is really bad now

AMD is saved by preorders and promises, but real supply is quite low and can't keep up with orders.

AMD already postponed announcement 2 times, but due to quite low TSMC yields and due to fact that 7nm lines are fully loaded with Apple and Huawei chips, they can't do better.

Rumors are that up to 30% of AMD chips go to trash bin being fully functional as they can't keep the frequency standards, many works properly only up to 2-2.3Ghz.

TSMC on Moore Law

First, let's discuss the elephant in the room. Some people believe that Moore's Law is dead because they believe it is no longer possible to continue to shrink the transistor any further. Just to give you an idea of the scale of the modern transistor, the typical gate is about 20 nanometers long. A water molecule is only 2.75 Angstrom or 0.275 nanometer in diameter! You can now start counting the number of atoms in a transistor. At this scale, many factors limit the fabrication of the transistor. The primary challenge is the control of materials at the atomic level. How do you place individual atoms to create a transistor? How do you do this for billions of transistors found on a modern chip? How do you build these chips that have billions of transistors in a cost effective manner?

To address this squarely, TSMC has recently announced our N5P node which further expands our leadership beyond the N5 node that will feature the world’s highest transistor density and offer the fastest performance. After being exposed to our technology roadmap, I can safely state that TSMC has many years of pioneering and innovation ahead of us where we will continue to shrink the individual transistor and continue to improve density. You will hear more from us in the coming months and years as we progress to new nodes.

Beyond the individual transistor, we also need to look at the system level density. Circling back and looking at the classic compute tasks of CPUs and GPUs, the modern chip has extremely fast transistor clock speeds that approach 5 gigahertz and beyond. The central challenge to these compute tasks is actually to keep the CPU and GPU cores fed with data. While this is classically a software challenge, modern architectures and methods for threading have squarely put the performance bottleneck at the hardware level. We have finally seen the limitations of memory caching in the era of big data analytics and AI.

To feed modern fast CPUs, GPUs and dedicated AI Processors, it is critical to provide memory that is both physically closer to the cores that are requesting the data for improved latency, in addition to supplying a higher bandwidth of data for the cores to process. This is what device level density provides. When memory is collocated closer to the logic cores, the system achieves lower latency, lower power consumption and higher overall performance.

Some of you may think that this is a system level concern and not an intrinsic attribute of a device technology. This may be strictly true in the past but the line is already getting blurry between the definition of a chip and the definition of a system. The line will continue to get more blurry and eventually will be completely eliminated. We have now transitioned from an era of design-technology co-optimization (DTCO) to system-technology co-optimization (STCO).

https://www.tsmc.com/english/newsEvents/blog_article_20190814.htm

Ryzen 7nm chips can have serious issues with reliability

The original limits for Ryzen 3000 SKUs were:

• 3600 = 4100MHz (80-95°C) / 4200MHz (< 80°C)
• 3600X = 4200MHz (80-95°C) / 4400MHz (< 80°C)
• 3700X = 4200MHz (80-95°C) / 4400MHz (< 80°C)
• 3800X = 4300MHz (80-95°C) / 4550MHz (< 80°C)
• 3900X = 4400MHz (80-95°C) / 4650MHz (< 80°C)

Since then, it appears that the HighTemperature limit has been reduced further to 75°C (from 80°C). New SMUs also have introduced "MiddleTemperature" limit, but that gets disabled when PBO is enabled.

AMD privately discovered fast degradation of CPU dies due to small 7nm process, such fats that it can break within warranty period.

Reliability of Sandy Bridge 32nm CPUs is around 10x-15x more compared to current 7nm process, and it still runs on same or higher clocks. Issue with new process is extreme leaks that can be up to 10x larger than on old processes.

The lead time for production of 7nm chips at Taiwan Semiconductor Manufacturing Company (TSMC) has extended to nearly six months from the previous two months because of strong demand, according to industry sources.

It is not much of demand issue, but issue of still quite low yields. Hence AMD design optimized for large number of defects.

Intel still has high hopes

GlobalFoundries laying off more than 400 workers at its Fab 8 computer chip factory in Malta last year may have benefited Intel. The staff were laid off after GloFlo decided not to bother with 7nm and to stick with the current cutting-edge 14-nanometre chips, GlobalFoundries was able to reduce its research and development expenses significantly.

Intel is building a $7 billion chip factory known as Fab 42 outside of Chandler, Arizona that is expected to make 7-nanometre chips eventually, and former GlobalFoundries workers that had been part of the 7-nanometre team at Fab 8 would be valuable to Intel as it gets its Fab 42 up and running.

According to LinkedIn dozens of former GlobalFoundries employees have found a home with Intel.

Best Intel hopes now are that to invest funds will want to keep two modern process manufacturers, despite any costs. Otherwise we can see slow Intel demise as 10nm process is clearly total failure for now.

Rumor came out today that Intel had canceled all plans for 10nm desktop processors, leaving a void until the company would introduce 7nm desktop processors in 2022.

Intel response:

"We continue to make great progress on 10nm, and our current roadmap of 10nm products includes desktop."

Roadmap only now and desktop can mean also Xeon type HEDT chips.

It is all very fishy, as most probably 10nm is the totally dead process, but one that have tens of billions USD invested, so sad to drop it totally.

Intel claims that 7nm will be simpler is total and utter bullshit.

From TSMC report

“While Intel will theoretically have 7nm parts out sometime in 2021...we believe it likely that CPU and other mainstream 7nm parts will not be on the road map until late that year, if not sometime in 2022.”

By the time Intel gets 7nm production going, TSMC will likely be making 3nm chips for much of Intel’s 7nm lifespan.

“Hence any hopes of Intel’s ability to ‘close the process gap’ seem forlorn, unless TSMC drops the ball (which, as of this moment, they are showing no signs of)”

Watch the monopoly being formed

Moore’s law, which is widely known, is the observation that the number of transistors in a leading-edge integrated circuit doubles about every two years.

Moore’s Second Law, which is less well known, states that the capital cost of a leading-edge semiconductor fab increases exponentially over time.

Semiconductor industry history shows us that once a company falls out of the leading-edge process race and moves to foundry model, it does not get back into the fab business. The foundry model plays to Moore’s Second Law by aggregating fab needs of these fabless players.

Critical time passed with half measures and Intel has now come to a stage where building on the current internal foundry model is increasingly infeasible and the x86 riches may no longer support a place at the front of the leading edge.

The revised capex budget TSMC presented at its recent Q3 earnings call - $14B to $15B for 2019 and likely a similar amount for 2020. TSMC, has reached approximate capex parity with Intel in spite of roughly half the revenues.

Intel will now have to increase its capex as a percentage of revenues. The problem is that Intel’s revenue opportunity is shrinking due to market share gains from AMD. On the other hand, TSMC revenues are growing leaving TSMC with the ability to spend more capex if it so desires. Intel’s margins will be reducing due to assault from AMD and increased capex spread over lower volumes.

Intel should be two distinct businesses:

• A cutting-edge semiconductor design company focusing primarily on CPUs and GPUs. This part of the company, despite recent under performance against AMD, is a potent organization. Chances of this group gaining back performance leadership are high.
• A fab that has underperformed recently, is facing dis-economies of scale governed by Moore’s Second Law and is likely to fall further and further behind.

Samsung, having fallen behind TSMC at 7nm, is in a similar situation. If there is strategic desire, and we believe that there is plenty, there is an opportunity for these players to consolidate their forces and create a viable foundry alternative to TSMC.

Intel has lost its process leadership to TSMC and the company is unlikely to get back to its top dog position in the industry.

While possibilities such as divesting fab operations and integrating them with Samsung fab operations exist and may be implemented, the organizational inertia at Intel makes the timing of such moves questionable. Given this reality, we find it highly likely that Intel has now forever lost its process leadership and will suffer immensely as a result.

China's National Integrated Circuit Industry Investment Fund (Big Fund) on October 22 set up a new fund of CNY204.15 billion (US$28.9 billion), marking the start of its second-phase support for domestic chipmakers, according to China company registration information.

Fund already spent an estimated CNY138.7 billion on its first-phase capital support for the local chip industry.

China is late to the party, and also does not have expertise in making equipment (that had been intentionally monopolized previously to control knowledge spread).

Real required investments now exceed $250-300 billions to just match 10-12nm process with enough volume required, and another $50-100 to match existing 7nm TSMC (without EUV).