The pixel size should be more reduced to increase the number of pixels in the same chip size. Also, forming deep PD is a key technology to avoid deterioration in image quality. To secure sufficient full well capacity (FWC) in small pixels, patterning and implementing technologies with higher difficulty level compared to the ones for semiconductor memory are required. Especially, it is essential to secure a high aspect ratio (>15:1) implant MASK process technology that can block high-energy ion implantation; in fact, the aspect ratio tends to be gradually increasing in the industry these days.
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