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PCI Express 6.0 specification released
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    PCI-SIG announced that PCI Express® (PCIe®) 6.0 technology will double the data rate to 64 GT/s while maintaining backwards compatibility with previous generations and delivering power efficiency and cost-effective performance. The PCIe 6.0 specification is actively targeted for release in 2021.

    PCIe 6.0 Specification Features

    • Delivers 64 GT/s raw bit rate and up to 256 GB/s via x16 configuration
    • Utilizes PAM-4 (Pulse Amplitude Modulation with 4 levels) encoding and leverages existing 56G PAM-4 in the industry
    • Includes low-latency Forward Error Correction (FEC) with additional mechanisms to improve bandwidth efficiency
    • Maintains backwards compatibility with all previous generations of PCIe technology

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    “PCI Express technology has established itself as a pervasive I/O technology by sustaining bandwidth improvements for five generations over two decades,” Dennis Martin, an analyst at Principled Technologies, said. “With the PCIe 6.0 specification, PCI-SIG aims to answer the demands of such hot markets as Artificial Intelligence, Machine Learning, networking, communication systems, storage, High-Performance Computing, and more.”

    “Continuing the trend we set with the PCIe 5.0 specification, the PCIe 6.0 specification is on a fast timeline,” Al Yanes, PCI-SIG Chairman and President, said. “Due to the continued commitment of our member companies, we are on pace to double the bandwidth yet again in a time frame that will meet industry demand for throughput.”

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  • PCI-SIG® continues to make great progress on the development of our next generation of PCIe® technology – the PCIe 6.0 specification. First announced three months ago during our U.S. Developers Conference in June, our members have fast-tracked development and Revision 0.3 of the specification is now complete and available to PCI-SIG member companies for review and input. This milestone of delivering the 0.3 spec in Oct 2019 validates our projection that we will be able to complete the final specification by 2021.

    PCIe 6.0 technology will double the data rate to 64 GT/s while maintaining backward compatibility with all previous spec generations. Two of the key changes that we’re implementing include PAM-4 (Pulse Amplitude Modulation with 4 levels) encoding and low-latency Forward Error Correction (FEC) with additional mechanisms to improve bandwidth efficiency.

    https://pcisig.com/pci-express%C2%AE-60-specification-track-revision-03-complete

  • Version 0.5 of PCI Express 6.0 Spec presented already.

    https://pcisig.com/specifications/review-zone

  • Version 0.7 of PCI Express 6.0 Spec presented

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    https://pcisig.com/specifications/review-zone

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  • The PCI-SIG, which is responsible for the development of PCI-based data transfer standards, has announced the adoption of the final specifications for the PCIe 6.0 standard.

    PCI-SIG noted three key features of the PCIe 6.0 standard:

    • doubling the bandwidth over PCIe 5.0 from 32 to 64 GT / s (gigatransactions per second). In a configuration of 16 PCIe 5.0 lanes, up to 256 GB of information per second is provided;
    • use of coding based on a flow control block (Flit) of a fixed size, which allows a simplified Low-latency Forward Error Correction (FEC) system, a pulse-amplitude modulation (PAM4) transmission scheme and a CRC (Cyclic redundancy check) algorithm to be applied to data integrity without affecting latency;
    • Backward compatible with all previous generations of PCIe standards.